Simulator Debugger for M32C Series
- Overview
- Documentation
- Design Support
- Further Information
Specifications
| I/O simulation | Data can be input/output cycle-by-cycle. |
| Interrupt simulation | Interrupt occurrence in units of cycles or time (msec/µsec) is enabled. |
| Execution time measurement | Execution time is worked out by the CPU operating frequency and the number of CPU execution cycles. * |
| Tracing feature | Trace logging up to 256K cycles is possible. |
| RAM monitor display | Any 1K byte of memory is displayable. |
| Coverage measurement | Coverage of all memory area can be measured. |
* This simulator debugger is an instruction set simulator and does not include bus width, queue, or wait events when counting the number of cycles. Rather, it uses the values indicated in the microcomputer software manual for the number of cycles.
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