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Items
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Specifications
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| CPU core |
- SH-4A core(*1) x 2
*1:
- (1) Max. operating frequency : 533MHz
- (2) Cache memory
- Instruction cache (IC)
: 32 KB, 4-way set associative
- Operand cache (OC)
: 32 KB, 4-way set associative
: Supports a cache coherency fucntion
- (3)On-chip RAM
- ILRAM: 8KB (High speed access at instruction fetch )
- OLRAM: 16KB (High speed access during data access
- (4) Other : FPU, MMU, etc.
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| L2 Cache |
- Capacity : 256KB
- Instruction/Data unified type
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| External interfaces |
- Local bus state controller:
Supports connection to SRAM, burst ROM, etc.
Supports MPX bus and PCMCIA interfaces.
Bus width : 8/16/32bit selectable
- DDR3-SDRAM memory controller
Bus width : 32bit
Maximum operating frequency : 533MHz
- PCI Express bus controller:
Operates as PCIe root port or endpoint.
Support for 1 virtual channels (VC)
Supports a multi-lane configuration (4/2/1)
: (4 lane + 1 lane) or (2 lane + 1 lane + 1 lane)
- USB controller:
USB 2.0 interface
Ports: 2 (1 host/function port, 1 host port)
Host: Support for EHCI ver. 1.0 and OHCI ver. 1.0a
Function: On-chip device controller with USB 2.0 support
Transfer speed: High-speed/full-speed
- Ethernet controller:
MII interface (no PHY) conforming to IEEE 802.3u
Support for frame transmit/receive
Support for 10/100 Mbps data transfer
Magic packet detection
Flow control (IEEE 802.3x/back pressure)
On-chip DMA controller for Ethernet controller
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| On-chip peripheral modules |
- Display unit : 854 x 480 dot (max.)
- FIFO serial communication interface x 6 channels (max.)
- SD host interface 2 channels (max)
- Direct memory access controller x 24 channels
- I2C interface x 2 channels (max)
- Timer x 12 channels
- Various sound interfaces
- Interrupt controller
- NAND flash memory controller x 1 (max)
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User Debugging
Interface
(H-UDI) |
- Supports connection to emulator
- AUD support: dedicated emulator function
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| Package |
- 593 pin BGA(25mm x 25mm, 0.8mm pitch)
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Americas
