| Item | Specification |
| CPU: | - 16bit H8/300H CPU
Upward compatible with H8/300 and H8/300L CPUs at object level - General-register archtecture : Sixteen 16bit general registers also usable as sixteen 8bit registers and eight 16bit registers, or eight 32bit registers.
- Sixty-two basic instructions
- Eight addressing modes
- 64Kbyte address space (H8/300H normal mode)
|
Memory options
(Memory map): | | ROM type | Group | Part number | ROM | RAM | Flash memory version
(F-ZTATTM version*) | H8/38704 | HD64F38704 | 32 Kbytes | 1 Kbyte | | H8/38702 | HD64F38702 | 16 Kbytes | 1 Kbyte | | Mask ROM Version | H8/38704 | HD64338704 | 32 Kbytes | 1 Kbyte | | H8/38703 | HD64338703 | 24 Kbytes | 1 Kbyte | | H8/38702 | HD64338702 | 16 Kbytes | 1 Kbyte | | H8/38702S | HD64338702S | 16 Kbytes | 512 byte | | H8/38701S | HD64338701S | 12 Kbytes | 512 byte | | H8/38700S | HD64338700S | 8 Kbytes | 512 byte |
| Notes: | * | F-ZTAT is a trademark of Renesas Electronics Corporation |
|
| Interrupts: | | External interrupt sources | 11sources(IRQ1, IRQ0, WKP7 to WKP0 , IRQAEC) | | Internal interrupt sources | 7sources |
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| Clock pulse generators: | | System clock pulse generator | 2.0 to 10 MHz*1 | | External clock input (1.0 to 10 MHz) | | Subclock pulse generator | 32.768 kHz, 38.4 kHz |
*1: System clock (f) supplied inside MCU is 1/2 of fosc. |
| Power supply and Operating frequency | - Flash memory version
- 4MHz version*1
 - 10MHz version*1
 - Mask ROM version*1
*1: 1/2 of fosc is supplied inside MCU as a System clock (f). |
| Power-down modes: | - Seven power-down modes
- Sleep (high-speed) mode
- Sleep (medium-speed) mode
- Standby mode
- Watch mode
- Subsleep mode
- Subactive mode
- Active (medium-speed) mode
|
| I/O ports: | | I/O ports: 50pins | I/O pins: 39pins | | Output pins: 6pins | | Input pins: 5pins |
|
| Timers: | 8-bit timer
| 2ch | Timer A | - Count-up timer with selection of eight internal clock signals divided from the system clock (φ) and four clock signals divided from the watch clock (φw )
| Watchdog timer
| - Reset operation at overflow of 8-bit counte
| | 16-bit timer | 2ch | Timer F | - Can be used as two independent 8-bit timers
- Count-up timer with selection of four internal clock signals or event input from external pin
- Provision for toggle output by means of compare-match function
| | Asynchronous external events | - Count-up timer able to count asynchronous external events independently of the MCU's internal clocks
- Asynchronous external events can be counted (both rising and falling edge detection possible)
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| Serial communication interface: | | SCI3 | 1ch | SCI3: 8-bit synchronous/asynchronous serial interface incorporates multiprocessor communication function |
|
| A/D converter: | | Resolution x Channel | Specification | | 10bit x 4ch | - Successive approximations using a resistance ladder
- Sample and hold function
- 4-channel analog input pins
- Conversion time: 31/φ or 62/φ per channel
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|
| 10bit PWM: | - Pulse-division PWM output for reduced ripple
- Can be used as a 10-bit D/A converter by connecting to an external low-pass filter.
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| Package and part number | | Package type | LQFP
Body :10 x 10mm
Pin pitck :0.5mm | QFP
Body :14 x 14mm
Pin pitch : 0.8mm | QFN
Body : 8 x 8mm
Pin pitch 0.4mm | Package code
(old code) | PLQP0064KC-A (FP-64E) | PLQP0064KB-A (FP-64K) | PRQP0064GB-A (FP-64A) | PVQN0064LB-A (TNP-64B) | | Flash memory version | HD64F38704FP10*1 | - | HD64F38704H10*1 | HD64F38704FT10*1 | | HD64F38704FP10*1 | - | HD64F38704H10*1 | HD64F38704FT10*1 | MaskROM version | HD6433870X*2FP | - | HD6433870X*2H | HD6433870X*2FT | | - | HD6433870X*2SFZ | HD6433870X*2SH | HD6433870X*2SFT |
*1: 10 or 4. This number indecates frequency options.
For detail of respective options, please see "power supply and operation frequency" above.
*2 : X indicates memory sizes. Please refer to the"memory map" above. |
Sample,
Mass production: | | WS | MP | | FLASH | OK | OK | | MASK | - | OK |
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Americas
