Americas
SH-MobileL3V
- Overview
- Design Support
Overview
The SH-MobileL3V is an application processor resulting from optimization of a high-end mobile phone SH-Mobile Series model for use in terrestrial digital broadcasting and video applications.
Renesas Electronics led the world with the release of the SH-Mobile Series of dedicated microprocessors for application processing in mobile phone systems, and has contributed to the advancement of multimedia applications for mobile phones. Renesas was also among the first to release digital TV broadcast capable products, and these are used in a wide variety of devices.
Now, in response to the rapid increase in the popularity of digital TV broadcast capable mobile phones, Renesas has developed the SH-MobileL3V offering excellent video processing capability at lower cost.
Key Features
| (1) | High-performance on-chip functions supporting terrestrial digital broadcasting |
| One-segment broadcasting for Japanese ISDB-T terrestrial digital
broadcasting capable mobile phones uses H.264/MPEG-4 AVC (referred to below as
H.264) as a moving image compression standard. The SH-MobileL3V incorporates a
VPU4 (Video Processing Unit 4) H.264-compatible high-performance video
processing IP, and achieves 30 fps (frame per second) encoding and decoding
performance at VGA definition. This makes possible smooth video display and
recording equivalent to that of a standard TV. With digital broadcasting services being introduced in various countries throughout the world, the SH-MobileL3V can also support systems such as DVB-II in Europe and DMB in South Korea. Moreover, since the VPU4 can also handle MPEG-4 processing, the SH-MobileL3V can implement a variety of moving image applications such as video mail, video phones, and video clips. |
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| (2) | Five-megapixel-class camera module support and image processing functions |
| The SH-MobileL3V incorporates a camera interface that allows direct
connection to a 5-megapixel-class camera module, together with image processing
functions, and can perform high-speed capture of large-volume image data from a
high-definition camera, and versatile image processing. Also included are a 24-bit LCD interface supporting a 16.78 million color LCD panel, together with high-image-quality compensation functions, enabling a variety of high-quality displays to be implemented. |
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| (3) | High-performance CPU core providing ample power for one-segment broadcast display processing |
| The SH-MobileL3V incorporates an SH4AL-DSP CPU core that achieves high processing performance of 389 MIPS (million instructions per second) at a maximum operating frequency of 216 MHz, providing ample power for one-segment broadcast display browser processing. Ample performance is also available for parallel processing of multiple large-load applications, and operations by a general-purpose OS such as Linux that imposes a greater processing load than a dedicated OS. |
Specifications
| Item | SH-MobileL3V Specifications |
| Product Name | SH7354 (R8A73540BG) |
| CPU core | SH4AL-DSP |
| Power supply voltage | Internal : 1.15 V to 1.3 V External : 2.5 V to 3.3 V or 1.65 V to 1.95 V |
| Maximum operating frequency | 216 MHz |
| Maximum processing performance | 389 MIPS (at 216 MHz operation) |
| On-chip RAM | 2 Kbytes |
| Cache memory | Separate 32 Kbytes for instructions and 32 Kbytes for
data 4-way set associative type |
| X/Y memory (for DSP) | 16 Kbytes |
| On-chip peripheral functions |
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| Interfaces |
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| Package | 281-pin CSP (9 mm x 11 mm x 1.4 mm, 0.5 mm pin pitch) |
Note: * I2C bus (Inter IC Bus) is an interface specification proposed by Royal Philips Electronics of the Netherlands.