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  • Overview

RX is a revolutionary new core developed by the world’s #1 microcontroller supplier, Renesas Electronics. With up to 165 DMIPS available, RX supports floating point operations and has built in digital signal processing capabilities which are needed to address today’s audio, video, and image processing needs. RX is also an extremely efficient core enabling up to 28% code size reductions over competing cores.

Watch the RX Core trailer and check back soon to see the full video.

 

The 32-bit RX central processing unit uses an Enhanced Harvard architecture with separate instruction and operand busses going to both Flash and SRAM enabling simultaneous instruction fetch and memory writes which boosts performance and is ideal for bandwidth intensive applications such as digital signal processing. Instructions are fed into the CPU from 100MHz Flash and are processed by a 5-stage execution pipeline enabling single clock operations. The CPU also integrates a single precision 32-bit floating point unit which performs complex non-linear math in fewer clock cycles, reduces code and data size, and simplifies code development. The multiply accumulate unit enables efficient digital signal processing and can eliminate the need for a separate DSP or ASIC device. The RX register set consists of nine control registers, sixteen 32-bit general purpose registers, and a 48-bit accumulator register. There is a memory protection unit with eight programmable protection regions. The interrupt control unit enables ultra fast 5-cycle interrupt latency. RX also supports on-chip debugging and is fully supported by in-house development tools and a wide variety of 3rd party development tools as well.


The RX instruction set consists of eight types of instructions. There are 30 instructions for arithmetic and logic operations, five instructions for bit manipulation, and nine instructions for system manipulation. To support different data transfer types there are fourteen different instructions. There are seven instructions to handle string manipulations and another seven for branches. The RX central processing unit also includes a single precision floating point unit and there are eight specific floating point instructions. There are also nine instructions for digital signal processing. In total the RX instruction set includes eighty nine instructions and over half of these are single clock instructions. The RX instructions are variable length with the exact instruction length depending on the data size and addressing mode used.


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