Technical Update
Device(34)
Document Title
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Doc Number (Previous Number) |
Issue Date Revision |
Classification of Information
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Product Name |
Remarks
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M32C/84 Group M32C/85 Group M32C/86 Group M32C/87 Group M32C/88 Group Usage Precaution for the WAIT Instruction
When entering wait mode from low-power consumption mode, if an interrupt request, which is used to exitwait mode, is acknowledged while the WAIT instruction is being executed, then the CPU may run out of control |
TN-16C-A168A/E |
Apr.02.08 Rev.1.00 |
Technical Notification
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109
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M32C/87 Group Document Revision for UART5 and UART6 in Serial interfaces (Serial I/O)
The description of the U5C0 register (UART5 Transmit/Receive Control Register 0) and the U6C0 register (UART6Transmit/Receive Control Register 0) has been revised.When using the subject document, please pay attention to the changes. |
TN-16C-A163A/E |
Feb.26.07 Rev.1.00 |
Technical Notification
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147
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M16C/80 Series M32C/80 Series Usage Precaution for Clock synchronous serial I/O mode in Serial interfaces (Serial I/O)
In clock synchronous serial I/O mode, unintended data reception may be started if continuous receive mode is enabled. |
TN-16C-A162A/E |
Feb.16.07 Rev.1.00 |
Technical Notification
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18
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M32C/81 M32C/82 and M32C/83 Groups:Usage Precaution for fC32
When the main clock is used as a CPU clock source and fC32 as a count source for timers A and B, fC32 clockcycles may become shorter because of the indeterminate supply voltage and noise. As a consequence, timers Aand B whose count source is fC32 may increase counting speed. |
TN-16C-A155A/E |
Jul.20.06 Rev.1.00 |
Technical Notification
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90
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M16C/70 Series M16C/80 Series M32C/80 Series M32C/90 Series : Usage Precaution for String Instruction Product-sum Operation Instruction
Since an interrupt is disabled, the interrupt-cancelled state occurs. Then the interrupt is acknowledged, and the string instructions or product-sum operation instruction is executed immediately after the acknowledgement. In this case, these instructions will be aborted. |
TN-16C-A157A/E |
Jun.08.06 Rev.1.00 |
Technical Notification
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45
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M32C/80 Series M32C/90 Series : Usage precation for MUL.W Instruction MULU.W Instruction
If the instruction, MUL.W or MULU.W and the memory for dest are used, the calculation result is 32-bit wide. Then, incorrect results are stored into the 16 high-order bits and also the next instructions are not executed as they are supposed to. |
TN-16C-A156A/E |
Jun.06.06 Rev.1.00 |
Technical Notification
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26
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M32C/80 Series Document Revision for Intelligent I/O Clock Asynchronous Serial I/O Mode (UART)
Correction of User's Manual |
TN-16C-A151A/E |
Apr.26.06 Rev.1.00 |
Technical Notification
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108
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M16C Family Precautions Concerning External Trigger Input in One-Shot Timer Mode of Timer A
When an external trigger input is used to start counting in one-shot timer mode of the timer A, another external trigger input during counting reloads a counter value and the timer continues counting. However, if another external trigger input is provided immediately before the counter reaches 0000h, the timer may stop counting. |
TN-16C-125A/EA |
Sep.16.04 Rev.1.00 |
Technical Notification
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144
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M16C Family Precautions when Using Single-Sweep Mode of the A/D Converter
When setting the ADST bit to 0 in single-sweep mode of A/D converter during A/D conversion and aborting A/D conversion, an A/D conversion interrupt may be generated. |
TN-16C-132A/EA |
Sep.01.04 Rev.1.00 |
Technical Notification
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98
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M16C Family Precautions when Using Serial Interface Special Mode 1 (I2C mode)
When setting each condition generate bit (STAREQ, RSTAREQ and STPREQ) from 0 to 1 within half cycle of the transfer clock after setting the STSPSEL bit to 0, each condition may not be generated accurately. |
TN-16C-130A/EA |
Sep.01.04 Rev.1.00 |
Technical Notification
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94
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M16C Family Precaution Concerning Exiting from Stop Mode
SCLL sync output enable is available in I2C bus interface mode only. |
TN-16C-124A/EA |
Sep.01.04 Rev.1.00 |
Technical Notification
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162
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M32C/80 Series Precautions When Canceling CAN Remote Frame Transmission/Reception
Process flow when aborting remote frame transmission or canceling remote frame reception. |
TN-16C-126A/EA |
Aug.06.04 Rev.1.00 |
Technical Notification
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88
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M32C/80 Series and M16C/80 Group Precaution Concerning Using NMI interrupt for Recovery from Stop Mode
After exiting from stop mode using the NMI interrupt, the microcomputer may not enter stop mode by setting the CM10 bit, all-clock stop bit, in the CM1 register to 1 (stop mode). |
TN-16C-127A/EA |
Aug.01.04 Rev.1.00 |
Technical Notification
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33
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M16C Family Precautions When Using Sub Clock
When using the sub clock (XCIN-XCOUT) as the CPU clock (BCLK) or as the timer count source, DO NOT leave the CM03 bit set to 1 (XCIN-XCOUT drive capacity HIGH ). |
TN-16C-119A/EA |
Jan.05.04 Rev.1.00 |
Technical Notification
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63
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Replace Sheets of Technical News No. M16C-115-0311 M16C/62P Precautions When Supplying Power to Microcomputer (Explanation of Addition in M16C/62 Group (M16C/62P) Data Sheet)
If the power supply gradient before power applied to the VCC1 pin reached 2.7V does not meet the SVcc conditions, the microcomputer may malfunction. |
TN-M16C-116-0311 |
Nov.11.03 Rev.1.00 |
Technical Notification
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509
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M32C/81 Group, M32C/82 Group and M32C/83 Group Precautions Concerning the UiC1 (i=0 to 4) Register
The UiERE bit in the UiC1 register may be set to 1 depending on the CLKi and CTSi pin states, and the UiMR register setting. |
TN-M16C-104-0310 |
Oct.01.03 Rev.1.00 |
Technical Notification
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21
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M16C/62P, M16C/26 and M16C/6K9 Precautions when using an External Clock as the Main Clock
Program may not operate correctly if an external clock, connected to the XIN pin while the main clock is selected as the CPU clock, is turned off temporarily and then restarted. |
TN-M16C-109-0309 |
Sep.16.03 Rev.1.00 |
Technical Notification
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73
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M16C/62P Group and M16C/26 Group Precautions when using Programmable I/O Ports
The input threshold differs for each input pin that shares inputs with other peripherals. |
TN-M16C-102-0309 |
Sep.16.03 Rev.1.00 |
Technical Notification
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117
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M32C/81, M32C/82 and M32C/83 groups Precaution on the DMAII Bit in the RLVL Register
If a hardware reset occurs while the INT0IC register or the RLVL register is being read, set the interrupt control register after setting the DMAII bit in the RLVL register to 0. |
TN-M16C-98-0308 |
Aug.01.03 Rev.1.00 |
Technical Notification
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20
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M32C/80 series and M16C/80 group Precaution on Stop Mode
The microcomputer may not enter stop mode with a certain condition. |
TN-M16C-97-0307 |
Jul.01.03 Rev.1.00 |
Technical Notification
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26
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Precaution for the Use of the Three-Phase Motor Control Timer Functions
Set the Value in the TAi-1 register, then rewrite the same value in the TAi-1 register after one cycle of the timer Ai count source has elapsed. |
TN-M16C-95-0304 |
Apr.01.03 Rev.1.00 |
Technical Notification
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20
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M32C/80 Series Cautions for Using DMAC
When using the DMAC of the M32C/80 series, if the DCTi (DMAi transfer count) register of channel i is set to '1', ensure that a DMA request for channel i is not generated when the DMA of the channel i is being enabled. |
TN-M16C-88-0209 |
Sep.01.02 Rev.1.00 |
Technical Notification
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9
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M16C/80, M32C/82 and M32C/83 Groups Usage Precaution on Three-phase Motor Control Timer's Function
While using the timers in Three-Phase Mode 1 and near Timer B2's overflow, if a count value is written to Timer Ai-1 register, a different count value may be written to Timer Ai instead of the value you want to set it to. |
TN-M16C-86-0205 |
May.16.02 Rev.1.00 |
Technical Notification
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14
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M16C Family Usage Precautions when Clearing Interrupt Request Bit
When clearing an interrupt request bit of the interrupt control register, depending on the instruction used, an interrupt request bit may not get cleared. |
TN-M16C-85-0204 |
Apr.01.02 Rev.1.00 |
Technical Notification
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24
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CAN transceiver control method with boot mode
When writing in the internal flash memory via CAN in boot mode, set the mode of CAN transceiver as high-speed mode or normal operation mode. |
TN-M16C-82-0201 |
Jan.16.02 Rev.1.00 |
Technical Notification
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40
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Corrections and Supplementary Explanation for M16C/20 Series, M16C/60 Series, M16C/80 Series Data Sheet and User's Manual
A few corrections and supplementary explanation for the M16C/20 series, M16C/60 series, M16C/80 series User's Manual. |
TN-M16C-75-0110 |
Oct.16.01 Rev.1.00 |
Technical Notification
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17
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Setting procedure of processor mode bits
Do not change the processor mode bits simultaneously with other bits when changing the processor mode bits 01 or 11. Change the processor mode bits after changing the other bits. |
TN-M16C-71-0105 |
May.16.01 Rev.1.00 |
Technical Notification
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17
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Supplemental Description for WAIT Peripheral Function Clock Stop Bit
When the MCU running in low-speed or low power dissipation mode, do not enter WAIT peripheral function clock stop bit set to 1. |
TN-M16C-69-0104 |
Apr.16.01 Rev.1.00 |
Technical Notification
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47
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M16C/80 Group Precautions for Using HOLD Signal
Although the HOLD pin may be held L P40 to P47 and P50 to P52 will not become high-impedance ports. |
TN-M16C-59-0008 |
Aug.01.00 Rev.1.00 |
Technical Notification
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11
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M16C/80 Series, M16C/60 Series Cautions for Using Memory Expansion Mode or Microprocessor Mode
Concerning the pins which function as address bus, data bus, or CS, WR, RD, etc. Set the corresponding port register and direction register after shifting to single-chip mode. |
TN-M16C-49-0004 |
Apr.01.00 Rev.1.00 |
Technical Notification
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8
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M16C/80 Group Cautions for Using DMA
There is a possibility that the DMAC will execute 2 transfers upon receiving only 1 DMA request or control of the MCU may be lost dpending on timing. |
TN-M16C-44-0001 |
Jan.16.00 Rev.1.00 |
Technical Notification
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18
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M16C/62 Group Flash Memory Versions Precautions for Standard Serial I/O mode
Apply a pull up resistor to NMI pin and disable interrupts when writing to M16C/62 Flash Memory Versions with Standard Serial I/O mode. |
TN-M16C-21-9904 |
Apr.01.99 Rev.1.00 |
Technical Notification
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12
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Note on dedicated input pin of the M16C/60 series MCU
When two or more different power sources are supplied to the system, if the input voltage of the unused dedicated input pin is higher than a voltage of Vcc pin, do not connect the dedicated input pin directly to the power source. This will cau |
TN-M16C-11-9710 |
Oct.01.97 Rev.1.00 |
Technical Notification
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11
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Note on using the A-D converter of the M16C/60 series MCU
When the A-D register is read at the same time the A-D conversion results are being saved, a false value will be saved to the A-D register. This occurs when the divided main clock or sub-clock is used as the CPU internal clock. |
TN-M16C-09-9705 |
May.16.97 Rev.1.00 |
Technical Notification
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14
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Others(8)
Document Title
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Doc Number (Previous Number) |
Issue Date Revision |
Classification of Information
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Size(KB)
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Product Name |
Remarks
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|---|---|---|---|---|---|---|---|
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Change of inner packing label
Change of inner packing label |
TN-WRP-A014A/E |
Jul.13.11 Rev.1.00 |
Packing Change
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344
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Change of the locking pin position in the magazine (P750PC) used for shipment
Change of the locking pin position in the magazine (P750PC) used for shipment |
TN-WRP-A013A/E |
Nov.12.08 Rev.1.00 |
Packing Change
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710
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Change with the stable supply of trays
Change with the stable supply of trays |
TN-WRP-A012A/E |
Sep.30.08 Rev.1.00 |
Packing Change
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1129
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Change of plastic reel of 330mm in diameter for embossed carrier tape (Standardization of plastic reel)
Standardization of plastic reel of 330mm in diameter to that complying with the JEITA standards (so-called EIAJ reel). |
TN-WRP-A010A/E |
Mar.24.08 Rev.1.00 |
Packing Change
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71
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Change of content printed on the side of inner box
We will unify the content printed on the inner box for IC trays for the purpose of standardizing our tray packaging specification. |
TN-WRP-A009A/E |
Jan.09.08 Rev.1.00 |
Packing Change
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30
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Addition of Shipping Tray Type for LQFP2020 Packages
Tray forming die is added in response to the increasing production of LQFP2020 packages, and for through handling in manufacturing factories, new tray type name is adopted. |
TN-WRP-A007A/E |
Jun.07.07 Rev.1.00 |
Packing Change
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136
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Change of reel diameter of embossed carrier tape (330 mmf reel to 254 mmf reel)
Change of reel diameter of embossed carrier tape(330 mmf reel to 254 mmf reel) |
TN-WRP-A006A/E |
Feb.14.07 Rev.1.00 |
Packing Change
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309
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Change of Carrier Tape Material *Change from polyvinyl chloride (PVC) to polystyrene (PS).
The career tape material is changed from PVC to PS. |
TN-WRP-A005A/E |
Jul.05.06 Rev.1.00 |
Packing Change
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32
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