Technical Update
Device(40)
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Doc Number (Previous Number) |
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M16C/62P Group, M16C/6K Group, M16C/6N Group, M16C/30P Group, M16C/29 Group, M16C/28 Group, M16C/26A Group, M16C/64 Group Note on Supply Voltage Fluctuation
A general note pertaining to supply voltage variations due to events like power supply noise. |
TN-16C-A187A/E |
Jun.21.10 Rev.1.00 |
Technical Notification
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28
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M16C/29 Group (Flash Memory Version): Precautional note for CAN I/O mode service termination in boot mode
CAN I/O mode service termination in boot mode |
TN-16C-A160B/E |
Oct.27.06 Rev.2.00 |
Technical Notification
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65
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Usage Precaution for Timer S - IC/OC Base Timer Interrupt
When the base timer is reset, an IC/OC base timer interrupt request may be generated twice. |
TN-16C-A159A/E |
Sep.06.06 Rev.1.00 |
Technical Notification
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25
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M16C/28 Group M16C/29 Group Precautions on Writing to I2C0 Data Shift Register (S00) of Multi-Master I2C bus Interface
Precautions for writing to the S00 register when the arbitration lost detection flag is set to 1. |
TN-16C-A149A/E |
Dec.08.05 Rev.1.00 |
Technical Notification
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28
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M16C/Tiny Series Document Revision for CRC Snoop Function in the CRC Calculation Circuit
The description of CRCSAR register (CRC snoop address register) has been revised as follows.When using the subject documents, please pay attention to the changes. |
TN-16C-A143A/E |
Jul.05.05 Rev.1.00 |
Technical Notification
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67
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M16C/Tiny Series Precautions When Main Clock Pins (XIN pin and XOUT pin) Are Not Connected To An Oscillator
When using any of the above mentioned microcomputers, if the main clock pins (XIN pin and XOUT pin) are not connected to an oscillator, the internal system clock may not operate after power is on and therefore the microcomputer will not be activated. |
TN-16C-A140A/E |
Apr.11.05 Rev.1.00 |
Technical Notification
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15
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M16C/28 Group Precautions on Delayed Trigger Mode 0 of A/D Converter
The timing when A/D conversion may not start properly in A/D converter delayed trigger mode 0. |
TN-16C-A137A/E |
Jan.31.05 Rev.1.00 |
Technical Notification
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22
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M16C Family Precautions Concerning External Trigger Input in One-Shot Timer Mode of Timer A
When an external trigger input is used to start counting in one-shot timer mode of the timer A, another external trigger input during counting reloads a counter value and the timer continues counting. However, if another external trigger input is provided immediately before the counter reaches 0000h, the timer may stop counting. |
TN-16C-125A/EA |
Sep.16.04 Rev.1.00 |
Technical Notification
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144
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M16C/Tiny Series, Flash Memory Version, Precautions of Standard Serial I/O Mode Entry Pin
An indeterminate value may be output from the I/O port while an L signal is applied to the RESET pin when entering standard serial I/O mode. |
TN-16C-133A/EA |
Sep.01.04 Rev.1.00 |
Technical Notification
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24
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M16C Family Precautions when Using Single-Sweep Mode of the A/D Converter
When setting the ADST bit to 0 in single-sweep mode of A/D converter during A/D conversion and aborting A/D conversion, an A/D conversion interrupt may be generated. |
TN-16C-132A/EA |
Sep.01.04 Rev.1.00 |
Technical Notification
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98
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M16C Family Precautions when Using Serial Interface Special Mode 1 (I2C mode)
When setting each condition generate bit (STAREQ, RSTAREQ and STPREQ) from 0 to 1 within half cycle of the transfer clock after setting the STSPSEL bit to 0, each condition may not be generated accurately. |
TN-16C-130A/EA |
Sep.01.04 Rev.1.00 |
Technical Notification
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94
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M16C Family Precaution Concerning Exiting from Stop Mode
SCLL sync output enable is available in I2C bus interface mode only. |
TN-16C-124A/EA |
Sep.01.04 Rev.1.00 |
Technical Notification
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162
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M16C/6N, M16C/1N, M16C/29 Group Precautions When Performing CAN Configuration
a.when the SMi2 bit in the SiC(i=3,4) register = 0(SOUTi output), |
TN-16C-122A/EA |
Sep.01.04 Rev.1.00 |
Technical Notification
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81
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M16C Family Precaution on entering wait mode
The value in the internal RAM area may be rewritten when exiting wait mode if writing to the internal RAM area before entering wait mode. |
TN-16C-128A/EA |
Aug.01.04 Rev.1.00 |
Technical Notification
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49
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M16C/60 Series Precautions for changing SI/O3,4 SI/O port select bit
Under the following conditions, the SOUTi (i=3,4) may be driven for about 10ns before going into a high-impedance state.a. when the SMi2 bit in the SiC(i=3,4) register = 0 (SOUTi output),b. SMi6 bit = 1 (internal clock),c. SMi3 bit is changed from 0 (I/O port) to 1 (SOUTi output, CLK function). |
TN-16C-121A/EA |
Aug.01.04 Rev.1.00 |
Technical Notification
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35
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M16C Family Precautions When Using Sub Clock
When using the sub clock (XCIN-XCOUT) as the CPU clock (BCLK) or as the timer count source, DO NOT leave the CM03 bit set to 1 (XCIN-XCOUT drive capacity HIGH ). |
TN-16C-119A/EA |
Jan.05.04 Rev.1.00 |
Technical Notification
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63
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M16C/26 Precaution in Boot mode
I/O Ports may be indeterminate in the boot mode. |
TN-M16C-110-0310 |
Oct.01.03 Rev.1.00 |
Technical Notification
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84
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M16C/62P, M16C/26 and M16C/6K9 Precautions when using an External Clock as the Main Clock
Program may not operate correctly if an external clock, connected to the XIN pin while the main clock is selected as the CPU clock, is turned off temporarily and then restarted. |
TN-M16C-109-0309 |
Sep.16.03 Rev.1.00 |
Technical Notification
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73
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M16C/62P, M16C/26 and M16C/6K9 Precautions when Using Wait Mode
If the microcomputer exits wait mode, the program may not operate correctly. |
TN-M16C-108-0309 |
Sep.16.03 Rev.1.00 |
Technical Notification
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391
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M16C/62P, M16C/26 and M16C/6K9 Precautions when Using Stop Mode
If the microcomputer exits stop mode?? the program may not operate correctly. |
TN-M16C-107-0309 |
Sep.16.03 Rev.1.00 |
Technical Notification
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92
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M16C/62P Group and M16C/26 Group Precautions when using Programmable I/O Ports
The input threshold differs for each input pin that shares inputs with other peripherals. |
TN-M16C-102-0309 |
Sep.16.03 Rev.1.00 |
Technical Notification
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117
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M16C/62P Group and M16C/26 Group Precautions when using Special Mode 4 (SIM mode) of UART2
A transmit interrupt request is generated when transmit data is written to the U2TB register while in special mode 4 (SIM mode) after reset. |
TN-M16C-101-0309 |
Sep.16.03 Rev.1.00 |
Technical Notification
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124
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M16C/62P Group Revision in Electrical Characteristics Section of the Preliminary Data Sheet Rev 1.0
The standard value of Pull-up resistor when applied 3V of power has been revised. These revisions have been made in the Hardware Manual Rev.1.10 and Data Sheet Rev.1.10 |
TN-M16C-99-0309 |
Sep.01.03 Rev.1.00 |
Technical Notification
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82
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M16C/60 Series, M16C/30 Series, M16C/20 Series Cautions for Writing to DMA Enable Bit in DMAi Control Register
While the DMAE bit in the DMiCON register is a 1 (the DMAi is in an active state), if you set the DMAE bit to a 1 and a DMA request occurs while your changing the bit, the DMAi will continue operating instead of returning to the initial state. |
TN-M16C-92-0306 |
Jun.16.03 Rev.1.00 |
Technical Notification
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70
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Precaution for the Use of the Three-Phase Motor Control Timer Functions
Set the Value in the TAi-1 register, then rewrite the same value in the TAi-1 register after one cycle of the timer Ai count source has elapsed. |
TN-M16C-95-0304 |
Apr.01.03 Rev.1.00 |
Technical Notification
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20
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M16C/80, M32C/82 and M32C/83 Groups Usage Precaution on Three-phase Motor Control Timer's Function
While using the timers in Three-Phase Mode 1 and near Timer B2's overflow, if a count value is written to Timer Ai-1 register, a different count value may be written to Timer Ai instead of the value you want to set it to. |
TN-M16C-86-0205 |
May.16.02 Rev.1.00 |
Technical Notification
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14
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M16C Family Usage Precautions when Clearing Interrupt Request Bit
When clearing an interrupt request bit of the interrupt control register, depending on the instruction used, an interrupt request bit may not get cleared. |
TN-M16C-85-0204 |
Apr.01.02 Rev.1.00 |
Technical Notification
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24
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M16C/62N Flash Memory Versions and M3062GF8NFP/GP Usage Precaution on Stop Mode
An undefined operation can occur after returning to normal operation mode from a stop mode because an undefined interrupt is generated or, a BRK instruction occurred, etc. |
TN-M16C-84-0204 |
Apr.01.02 Rev.1.00 |
Technical Notification
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393
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CAN transceiver control method with boot mode
When writing in the internal flash memory via CAN in boot mode, set the mode of CAN transceiver as high-speed mode or normal operation mode. |
TN-M16C-82-0201 |
Jan.16.02 Rev.1.00 |
Technical Notification
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40
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Corrections and Supplementary Explanation for M16C/20 Series, M16C/60 Series, M16C/80 Series Data Sheet and User's Manual
A few corrections and supplementary explanation for the M16C/20 series, M16C/60 series, M16C/80 series User's Manual. |
TN-M16C-75-0110 |
Oct.16.01 Rev.1.00 |
Technical Notification
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17
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Supplemental Description for WAIT Peripheral Function Clock Stop Bit
When the MCU running in low-speed or low power dissipation mode, do not enter WAIT peripheral function clock stop bit set to 1. |
TN-M16C-69-0104 |
Apr.16.01 Rev.1.00 |
Technical Notification
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47
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Points to care about when using M16C/6N0, M16C/6N1 and M16C/6N3 groups Status read of the CAN module
If CPU and CAN module attempt to access the SFR at the same time, please note that CPU access to SFR will not synchronize with the CAN module rewrite period. |
TN-M16C-63-0011 |
Nov.16.00 Rev.1.00 |
Technical Notification
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24
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M16C Family Cautions Using Data Registers that Include Write Only Bits
If performing a read-modify-write sequence of instructions to a register with write only bits, please reset the write only bits to their previous values before writing back to the register. |
TN-M16C-55-0006 |
Jun.01.00 Rev.1.00 |
Technical Notification
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46
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M16C/60, M16C/20 Series Precautions for Wait and Stop modes
The interrupts for canceling the WAIT and STOP modes must be enabled before entering either mode. The priority level of the interrupts not used for these modes should be set to 0 before switching into the WAIT or STOP modes. |
TN-M16C-25-9905 |
May.16.99 Rev.1.00 |
Technical Notification
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15
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M16C/62 Group Flash Memory Versions Precautions for Standard Serial I/O mode
Apply a pull up resistor to NMI pin and disable interrupts when writing to M16C/62 Flash Memory Versions with Standard Serial I/O mode. |
TN-M16C-21-9904 |
Apr.01.99 Rev.1.00 |
Technical Notification
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12
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M16C/60 Group, M16C/61 Group, M16C/62 Group Precautions For Power Control State Transitions
Wait to change modes until after oscillation has stabilized. |
TN-M16C-17-9902 |
Feb.16.99 Rev.1.00 |
Technical Notification
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21
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Precautions Regarding Writing to M16C/60, M16C/61, M16C/62 and M16C/63 Group MCUs Interrupt Control Registers
An incorrect interrupt may occur when the request bit of the interrupts is cleared or the interrupt priority level is changed in interrupt enable condition. |
TN-M16C-14-9805 |
May.22.98 Rev.1.00 |
Technical Notification
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19
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Supplemental Description of DMAC for the M16C/60, M16C/61 and M16C/62 Group MCUs
(1) In DMA active condition? if the DMA enable bit is set to 1, the DMAC will start to operate again from the initial conditions.(2) After the DMA request cause select bit has been modified, always clear the DMA request bit to 0. |
TN-M16C-13-9802 |
Feb.01.98 Rev.1.00 |
Technical Notification
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15
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Note on dedicated input pin of the M16C/60 series MCU
When two or more different power sources are supplied to the system, if the input voltage of the unused dedicated input pin is higher than a voltage of Vcc pin, do not connect the dedicated input pin directly to the power source. This will cau |
TN-M16C-11-9710 |
Oct.01.97 Rev.1.00 |
Technical Notification
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11
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Note on using the A-D converter of the M16C/60 series MCU
When the A-D register is read at the same time the A-D conversion results are being saved, a false value will be saved to the A-D register. This occurs when the divided main clock or sub-clock is used as the CPU internal clock. |
TN-M16C-09-9705 |
May.16.97 Rev.1.00 |
Technical Notification
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14
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Others(8)
Document Title
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Doc Number (Previous Number) |
Issue Date Revision |
Classification of Information
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Size(KB)
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Product Name |
Remarks
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Change of inner packing label
Change of inner packing label |
TN-WRP-A014A/E |
Jul.13.11 Rev.1.00 |
Packing Change
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344
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Change of the locking pin position in the magazine (P750PC) used for shipment
Change of the locking pin position in the magazine (P750PC) used for shipment |
TN-WRP-A013A/E |
Nov.12.08 Rev.1.00 |
Packing Change
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710
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Change with the stable supply of trays
Change with the stable supply of trays |
TN-WRP-A012A/E |
Sep.30.08 Rev.1.00 |
Packing Change
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1129
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Change of plastic reel of 330mm in diameter for embossed carrier tape (Standardization of plastic reel)
Standardization of plastic reel of 330mm in diameter to that complying with the JEITA standards (so-called EIAJ reel). |
TN-WRP-A010A/E |
Mar.24.08 Rev.1.00 |
Packing Change
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71
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Change of content printed on the side of inner box
We will unify the content printed on the inner box for IC trays for the purpose of standardizing our tray packaging specification. |
TN-WRP-A009A/E |
Jan.09.08 Rev.1.00 |
Packing Change
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30
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Addition of Shipping Tray Type for LQFP2020 Packages
Tray forming die is added in response to the increasing production of LQFP2020 packages, and for through handling in manufacturing factories, new tray type name is adopted. |
TN-WRP-A007A/E |
Jun.07.07 Rev.1.00 |
Packing Change
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136
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Change of reel diameter of embossed carrier tape (330 mmf reel to 254 mmf reel)
Change of reel diameter of embossed carrier tape(330 mmf reel to 254 mmf reel) |
TN-WRP-A006A/E |
Feb.14.07 Rev.1.00 |
Packing Change
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309
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Change of Carrier Tape Material *Change from polyvinyl chloride (PVC) to polystyrene (PS).
The career tape material is changed from PVC to PS. |
TN-WRP-A005A/E |
Jul.05.06 Rev.1.00 |
Packing Change
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32
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