Technical Update
Device(27)
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30240 Group: Usage Precautions for USB AUTOSET Function
To execute an IN transfer of Endpoint1 to 4, transmission output may not be executed to use AUTOSET function. |
TN-16C-A152A/E |
Apr.24.06 Rev.1.00 |
Technical Notification
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13
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M30245 Group Correction and Precautions on I2C bus interface mode
Correction and Precautions on I2C bus interface mode |
TN-16C-136A/EA |
Oct.01.04 Rev.1.00 |
Technical Notification
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37
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M30245FCGP Precaution on Serial Sound Interface (SSI)
The first bit of a SSI transmission data may change its value afther the output valid time [0.5 cycle of SCK + 3cycles of BCLK]. |
TN-16C-135A/EA |
Oct.01.04 Rev.1.00 |
Technical Notification
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60
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M16C Family Precautions Concerning External Trigger Input in One-Shot Timer Mode of Timer A
When an external trigger input is used to start counting in one-shot timer mode of the timer A, another external trigger input during counting reloads a counter value and the timer continues counting. However, if another external trigger input is provided immediately before the counter reaches 0000h, the timer may stop counting. |
TN-16C-125A/EA |
Sep.16.04 Rev.1.00 |
Technical Notification
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144
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M16C Family Precaution Concerning Exiting from Stop Mode
SCLL sync output enable is available in I2C bus interface mode only. |
TN-16C-124A/EA |
Sep.01.04 Rev.1.00 |
Technical Notification
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162
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M30245 Group Precautions on I2C bus interface mode
SWC,SWC2,SWC9,STC are unavailable when SCLi is external clock in I2C bus interface mode. |
TN-16C-123A/EA |
Jun.01.04 Rev.1.00 |
Technical Notification
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17
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M30245 Group Precautions concerning UiC1 (i= 0 to 3) register
The UiERE bit in the UiC1 register is set to 1 automatically (error signal output enabled) in certain conditions of CLKi pin and CTSi pin. If the PRYE bit in the UiMR register is set to 1 (parity enabled), the TxDi pin is held L if a parity error occurs during reception. |
TN-16C-120A/EA |
Feb.01.04 Rev.1.00 |
Technical Notification
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14
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M30245MC/8-XXXGP Cautions on Serial I/O
Under certain condition there is a possibility that the cycle when the first data transfer is available is delayed for 256 cycles of BRG count source. |
TN-M16C-112-0309 |
Sep.16.03 Rev.1.00 |
Technical Notification
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24
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M16C/60 Series, M16C/30 Series, M16C/20 Series Cautions for Writing to DMA Enable Bit in DMAi Control Register
While the DMAE bit in the DMiCON register is a 1 (the DMAi is in an active state), if you set the DMAE bit to a 1 and a DMA request occurs while your changing the bit, the DMAi will continue operating instead of returning to the initial state. |
TN-M16C-92-0306 |
Jun.16.03 Rev.1.00 |
Technical Notification
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70
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M16C Family Usage Precautions when Clearing Interrupt Request Bit
When clearing an interrupt request bit of the interrupt control register, depending on the instruction used, an interrupt request bit may not get cleared. |
TN-M16C-85-0204 |
Apr.01.02 Rev.1.00 |
Technical Notification
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24
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Supplemental Description for WAIT Peripheral Function Clock Stop Bit
When the MCU running in low-speed or low power dissipation mode, do not enter WAIT peripheral function clock stop bit set to 1. |
TN-M16C-69-0104 |
Apr.16.01 Rev.1.00 |
Technical Notification
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47
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Precautions Regarding USB Packet Size in M30240Mx-xxxFP
When there is a USB transaction in which the actual data packet size = (MAXP-1), its return packet may be shortened to only one byte. |
TN-M16C-65-0011 |
Nov.08.00 Rev.1.00 |
Technical Notification
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13
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Notes on USB control registers of M30240 Group
There is a possibility that using read-modify-write instructions to the USB control and status registers might cause incorrect data to be written to these registers. |
TN-M16C-60-0009 |
Sep.01.00 Rev.1.00 |
Technical Notification
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19
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Notes on Control Transfer of M30240 Group One Time PROM version
Endpoint x (x = 1-4) transfer during control transfer may cause an unexpected response. |
TN-M16C-58-0007 |
Jul.01.00 Rev.1.00 |
Technical Notification
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22
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M16C Family Cautions Using Data Registers that Include Write Only Bits
If performing a read-modify-write sequence of instructions to a register with write only bits, please reset the write only bits to their previous values before writing back to the register. |
TN-M16C-55-0006 |
Jun.01.00 Rev.1.00 |
Technical Notification
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46
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M16C/80 Series, M16C/60 Series Cautions for Using Memory Expansion Mode or Microprocessor Mode
Concerning the pins which function as address bus, data bus, or CS, WR, RD, etc. Set the corresponding port register and direction register after shifting to single-chip mode. |
TN-M16C-49-0004 |
Apr.01.00 Rev.1.00 |
Technical Notification
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8
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M16C Family Cautions for Event counter mode with Timer A
In the case of using Event counter mode as Free-Run type for timer A, the timer register contents may be unknown when counting begins. |
TN-M16C-39-9911 |
Nov.01.99 Rev.1.00 |
Technical Notification
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8
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M16C/60 Series Precautions for Address Match Interrupt
When external address and 8-bit bus, you can not use the address match interrupt for external address. |
TN-M16C-32-9908 |
Aug.01.99 Rev.1.00 |
Technical Notification
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7
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M16C/61, M16C/62 Group Precautions for UART2
When using UART2 in UART mode choose internal clock. |
TN-M16C-26-9905 |
May.16.99 Rev.1.00 |
Technical Notification
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20
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M16C/60, M16C/20 Series Precautions for Wait and Stop modes
The interrupts for canceling the WAIT and STOP modes must be enabled before entering either mode. The priority level of the interrupts not used for these modes should be set to 0 before switching into the WAIT or STOP modes. |
TN-M16C-25-9905 |
May.16.99 Rev.1.00 |
Technical Notification
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15
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M16C/62 Group Flash Memory Versions Precautions for Standard Serial I/O mode
Apply a pull up resistor to NMI pin and disable interrupts when writing to M16C/62 Flash Memory Versions with Standard Serial I/O mode. |
TN-M16C-21-9904 |
Apr.01.99 Rev.1.00 |
Technical Notification
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12
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'N0.M16C-16-9902' replace M16C/60 Group, M16C/61 Group, M16C/62 Group Precautions Setting Pull-up Resistor
In memory expansion and microprocessor modes, some ports cannot be connected to pull-up resistor.TECHNICAL NEWS 'N0.M16C-16-9902' includes an error. This is the corrected version of 'N0.M16C-16-9902'. |
TN-M16C-19-9903 |
Mar.16.99 Rev.1.00 |
Technical Notification
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14
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M16C/60 Group, M16C/61 Group, M16C/62 Group Precautions For Power Control State Transitions
Wait to change modes until after oscillation has stabilized. |
TN-M16C-17-9902 |
Feb.16.99 Rev.1.00 |
Technical Notification
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21
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Precautions Regarding Writing to M16C/60, M16C/61, M16C/62 and M16C/63 Group MCUs Interrupt Control Registers
An incorrect interrupt may occur when the request bit of the interrupts is cleared or the interrupt priority level is changed in interrupt enable condition. |
TN-M16C-14-9805 |
May.22.98 Rev.1.00 |
Technical Notification
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19
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Supplemental Description of DMAC for the M16C/60, M16C/61 and M16C/62 Group MCUs
(1) In DMA active condition? if the DMA enable bit is set to 1, the DMAC will start to operate again from the initial conditions.(2) After the DMA request cause select bit has been modified, always clear the DMA request bit to 0. |
TN-M16C-13-9802 |
Feb.01.98 Rev.1.00 |
Technical Notification
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15
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Note on dedicated input pin of the M16C/60 series MCU
When two or more different power sources are supplied to the system, if the input voltage of the unused dedicated input pin is higher than a voltage of Vcc pin, do not connect the dedicated input pin directly to the power source. This will cau |
TN-M16C-11-9710 |
Oct.01.97 Rev.1.00 |
Technical Notification
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11
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Note on using the A-D converter of the M16C/60 series MCU
When the A-D register is read at the same time the A-D conversion results are being saved, a false value will be saved to the A-D register. This occurs when the divided main clock or sub-clock is used as the CPU internal clock. |
TN-M16C-09-9705 |
May.16.97 Rev.1.00 |
Technical Notification
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14
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Others(8)
Document Title
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Doc Number (Previous Number) |
Issue Date Revision |
Classification of Information
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Size(KB)
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Product Name |
Remarks
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|---|---|---|---|---|---|---|---|
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Change of inner packing label
Change of inner packing label |
TN-WRP-A014A/E |
Jul.13.11 Rev.1.00 |
Packing Change
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344
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Change of the locking pin position in the magazine (P750PC) used for shipment
Change of the locking pin position in the magazine (P750PC) used for shipment |
TN-WRP-A013A/E |
Nov.12.08 Rev.1.00 |
Packing Change
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710
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Change with the stable supply of trays
Change with the stable supply of trays |
TN-WRP-A012A/E |
Sep.30.08 Rev.1.00 |
Packing Change
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1129
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Change of plastic reel of 330mm in diameter for embossed carrier tape (Standardization of plastic reel)
Standardization of plastic reel of 330mm in diameter to that complying with the JEITA standards (so-called EIAJ reel). |
TN-WRP-A010A/E |
Mar.24.08 Rev.1.00 |
Packing Change
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71
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Change of content printed on the side of inner box
We will unify the content printed on the inner box for IC trays for the purpose of standardizing our tray packaging specification. |
TN-WRP-A009A/E |
Jan.09.08 Rev.1.00 |
Packing Change
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30
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Addition of Shipping Tray Type for LQFP2020 Packages
Tray forming die is added in response to the increasing production of LQFP2020 packages, and for through handling in manufacturing factories, new tray type name is adopted. |
TN-WRP-A007A/E |
Jun.07.07 Rev.1.00 |
Packing Change
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136
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Change of reel diameter of embossed carrier tape (330 mmf reel to 254 mmf reel)
Change of reel diameter of embossed carrier tape(330 mmf reel to 254 mmf reel) |
TN-WRP-A006A/E |
Feb.14.07 Rev.1.00 |
Packing Change
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309
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Change of Carrier Tape Material *Change from polyvinyl chloride (PVC) to polystyrene (PS).
The career tape material is changed from PVC to PS. |
TN-WRP-A005A/E |
Jul.05.06 Rev.1.00 |
Packing Change
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32
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