M16C Family (R32C/M32C/M16C)

MPU & MCU

Technical Update

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ALL (132)
Device (124)
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Device(124)

Document Title	Doc Number (Previous Number)	Issue Date Revision	Classification of Information	Size(KB)	Product Name	Remarks
Descriptions changed in M16C/5LD Group, M16C/56D Group User's Manual Some specifications of the M16C/5LD and M16C/56D Groups have been changed.	TN-16C-A210A/E	Dec.14.11 Rev.1.00	Technical Notification	92	List	-
Explanation of the RDY Signal for the M16C/30 Series and M16C/60 Series Both high and low inputs to the RDY pin must meet tsu (RDY-BCLK) and th(BCLK-RDY).	TN-16C-A209A/E	Dec.14.11 Rev.1.00	Technical Notification	46	List	-
Descriptions changed in M16C/5L Group, M16C/56 Group User's Manual Some specifications of the M16C/5L and M16C/56 Groups have been changed. MCU usage and setting procedures have also been added or changed.	TN-16C-A205A/E	Oct.14.11 Rev.1.00	Technical Notification	130	List	-
Descriptions changed in M16C/5M Group, M16C/57 Group User's Manual Some specifications of the M16C/5M and M16C/57 Groups have been changed. MCU usage and setting procedures have also been added or changed.	TN-16C-A204A/E	Oct.14.11 Rev.1.00	Technical Notification	112	List	-
Errata to R32C/111 Group Hardware Manual No.3 This document describes corrections to the R32C/111 Group Hardware Manual, Rev.1.10.	TN-16C-A208A/E	Oct.05.11 Rev.1.00	Technical Notification	341	List	-
Errata to R32C/111 Group, R32C/120 Group, R32C/121 Group, R32C/160 Group, R32C/161 Group Hardware Manuals This document describes corrections to the I/O Pins chapter of hardware manuals listed above.	TN-16C-A198A/E	Mar.18.11 Rev.1.00	Technical Notification	109	List	-
Specification Modifications in M16C/64 Groups Specifications of the M16C/64 Group have changed. MCU usage and setting procedures have also been added or changed.	TN-16C-A202A/E	Mar.10.11 Rev.1.00	Technical Notification	114	List	-
Specification Modifications in M16C/65, M16C/64A, M16C/63, and M16C/6C Groups Specifications of the M16C/65, M16C/64A, M16C/63, and M16C/6C Groups have changed. MCU usage andsetting procedures have also been added or changed.	TN-16C-A201A/E	Mar.10.11 Rev.1.00	Technical Notification	272	List	-
Errata to R32C/116 Group, R32C/117 Group, R32C/118 Group, R32C/116A Group, R32C/117A Group, R32C/118A Group User's Manuals This document describes corrections to the I/O Pins chapter of the user's manuals listed above.	TN-16C-A200A/E	Mar.10.11 Rev.1.00	Technical Notification	110	List	-
Errata to R32C/151 Group, R32C/152 Group, R32C/153 Group User's Manuals This document describes corrections to the I/O Pins chapter of the user's manuals listed above.	TN-16C-A199A/E	Mar.08.11 Rev.1.00	Technical Notification	109	List	-
Errata to R32C/157 Group Hardware Manual This document describes corrections to the R32C/157 Group Hardware Manual, Rev. 1.03.	TN-16C-A197A/E	Mar.08.11 Rev.1.00	Technical Notification	358	List	-
Errata to R32C/156 Group Hardware Manual This document describes corrections to the R32C/156 Group Hardware Manual, Rev. 1.03.	TN-16C-A196A/E	Mar.08.11 Rev.1.00	Technical Notification	354	List	-
Errata to R32C/153 Group Hardware Manual This document describes corrections to the R32C/153 Group Hardware Manual, Rev. 1.03.	TN-16C-A195A/E	Nov.01.10 Rev.1.00	Technical Notification	636	List	-
Errata to R32C/152 Group Hardware Manual This document describes corrections to the R32C/152 Group Hardware Manual, Rev. 1.03.	TN-16C-A194A/E	Nov.01.10 Rev.1.00	Technical Notification	636	List	-
Errata to R32C/151 Group Hardware Manual This document describes corrections to the R32C/151 Group Hardware Manual, Rev. 1.03.	TN-16C-A193A/E	Nov.01.10 Rev.1.00	Technical Notification	630	List	-
Errata to R32C/118 Group Hardware Manual This document describes corrections to the R32C/118 Group Hardware Manual, Rev. 1.00.	TN-16C-A192A/E	Sep.15.10 Rev.1.00	Technical Notification	175	List	-
Errata to R32C/117 Group Hardware Manual This document describes corrections to the R32C/117 Group Hardware Manual, Rev. 1.00.	TN-16C-A191A/E	Sep.15.10 Rev.1.00	Technical Notification	181	List	-
Errata to R32C/116 Group Hardware Manual This document describes corrections to the R32C/116 Group Hardware Manual, Rev. 1.00.	TN-16C-A190A/E	Sep.15.10 Rev.1.00	Technical Notification	175	List	-
M16C/65 Group, M16C/64A Group Easing the Limitation of the Debugging Interface A 1-wire debugging interface is now available for the E8a emulator.	TN-16C-A188A/E	Aug.16.10 Rev.1.00	Technical Notification	19	List	-
M16C/6C Group Notes on Using Memory Expansion Mode and Microprocessor Mode The UVCC level becomes undefined if a certain condition is met. When this occurs, problems such as an external device not being read correctly or port P1 outputting an unexpected level may occur.	TN-16C-A189A/E	Aug.03.10 Rev.1.00	Technical Notification	95	List	-
M16C/62P Group, M16C/6K Group, M16C/6N Group, M16C/30P Group, M16C/29 Group, M16C/28 Group, M16C/26A Group, M16C/64 Group Note on Supply Voltage Fluctuation A general note pertaining to supply voltage variations due to events like power supply noise.	TN-16C-A187A/E	Jun.21.10 Rev.1.00	Technical Notification	28	List	-
M16C/64 Group Note on Boot Mode When starting up in boot mode, an external bus signal is not output.	TN-16C-A184A/E	Mar.26.10 Rev.1.00	Technical Notification	16	List	-
M16C/63 Group, M16C/6C Group Easing the Limitation of the Debugging Interface A 1-wire debugging interface is now available for the E8a emulator.	TN-16C-A186A/E	Mar.25.10 Rev.1.00	Technical Notification	34	List	-
A Programming Note on Wait Mode and Stop Mode in the R32C/100 Series This document describes possible errata with the R32C Series in which the device exits wait mode or stop mode immediately without any interrupt.	TN-16C-A182A/E	Feb.02.10 Rev.1.00	Technical Notification	435	List	-
Errata to R32C/111 Group Hardware Manual No. 2 This document describes corrections to the R32C/111 Group Hardware Manual, Rev. 1.00.	TN-16C-A181A/E	Oct.16.09 Rev.1.00	Technical Notification	444	List	-
Note on Generating STOP Condition in Multi-master I2C-bus Interface for R32C/116 Group, R32C/117 Group, and R32C/118 Group In the multi-master I2C-bus interface, when the slave device and/or other master devices drive the MSCL line low, no normal STOP condition is generated. This is because the MSDA line is released while the MSCL line is still driven low.	TN-16C-A180A/E	Jul.15.09 Rev.1.00	Technical Notification	418	List	-
M16C/65, M16C/64A, M16C/64 Groups Flash Memory Notes on Slow Read Mode Use the slow read mode under the condition described in this technical update.	TN-16C-A179A/E	Jul.15.09 Rev.1.00	Technical Notification	21	List	-
M16C/65, M16C/64A Groups Serial Interface CLK Pin Note on Selecting N-channel Open Drain Output While using the CLK pin as an input port, the CLK pin outputs low-level signal when the specified conditions are met.	TN-16C-A178A/E	Jul.15.09 Rev.1.00	Technical Notification	24	List	-
M16C/65, M16C/64A Groups Notes on Starting the PLL Clock and 40MHz On-Chip Oscillator Clock The voltage detector and 125kHz on-chip oscillator clock may be affected when starting oscillation of the PLL clock or 40MHz on-chip oscillator clock.	TN-16C-A177A/E	Jul.15.09 Rev.1.00	Technical Notification	42	List	-
M16C/65, M16C/64A Groups Note on Generating Stop Condition in Multi-Master I2C-bus Interface In the multi-master I2C-bus interface, when the slave device and/or other master devices drive the SCLMM line low, no normal stop condition is generated. This is because the SDAMM line is released while the SCLMM line is still driven low	TN-16C-A176A/E	Jul.15.09 Rev.1.00	Technical Notification	38	List	-
M16C/65, M16C/64A Groups Notes on Using EW1 Mode The MCU may malfunction when using EW1 mode, which is one of the internal flash memory rewrite function, under the following conditions.	TN-16C-A175A/E	Jul.15.09 Rev.1.00	Technical Notification	118	List	-
Errata to R32C/111 Group Hardware Manual This document describes corrections to the R32C/111 Group Hardware Manual, Rev. 1.00.	TN-16C-A174A/E	Jun.09.09 Rev.1.00	Technical Notification	439	List	-
M16C/6N Group Usage Precaution for the WAIT Instruction When entering wait mode from low-power dissipation mode at low voltage, if an interrupt request, which is used to exit wait mode, is acknowledged while the WAIT instruction is being executed, then the MCU may run out of control.	TN-16C-A173A/E	Dec.10.08 Rev.1.00	Technical Notification	40	List	-
M32C/84 Group M32C/85 Group M32C/86 Group M32C/87 Group M32C/88 Group Usage Precaution for the WAIT Instruction When entering wait mode from low-power consumption mode, if an interrupt request, which is used to exitwait mode, is acknowledged while the WAIT instruction is being executed, then the CPU may run out of control	TN-16C-A168A/E	Apr.02.08 Rev.1.00	Technical Notification	109	List	-
M32C/87 Group Document Revision for UART5 and UART6 in Serial interfaces (Serial I/O) The description of the U5C0 register (UART5 Transmit/Receive Control Register 0) and the U6C0 register (UART6Transmit/Receive Control Register 0) has been revised.When using the subject document, please pay attention to the changes.	TN-16C-A163A/E	Feb.26.07 Rev.1.00	Technical Notification	147	List	-
M16C/80 Series M32C/80 Series Usage Precaution for Clock synchronous serial I/O mode in Serial interfaces (Serial I/O) In clock synchronous serial I/O mode, unintended data reception may be started if continuous receive mode is enabled.	TN-16C-A162A/E	Feb.16.07 Rev.1.00	Technical Notification	18	List	-
M16C/29 Group (Flash Memory Version): Precautional note for CAN I/O mode service termination in boot mode CAN I/O mode service termination in boot mode	TN-16C-A160B/E	Oct.27.06 Rev.2.00	Technical Notification	65	List	-
Usage Precaution for Timer S - IC/OC Base Timer Interrupt When the base timer is reset, an IC/OC base timer interrupt request may be generated twice.	TN-16C-A159A/E	Sep.06.06 Rev.1.00	Technical Notification	25	List	-
M32C/81 M32C/82 and M32C/83 Groups:Usage Precaution for fC32 When the main clock is used as a CPU clock source and fC32 as a count source for timers A and B, fC32 clockcycles may become shorter because of the indeterminate supply voltage and noise. As a consequence, timers Aand B whose count source is fC32 may increase counting speed.	TN-16C-A155A/E	Jul.20.06 Rev.1.00	Technical Notification	90	List	-
M16C/70 Series M16C/80 Series M32C/80 Series M32C/90 Series : Usage Precaution for String Instruction Product-sum Operation Instruction Since an interrupt is disabled, the interrupt-cancelled state occurs. Then the interrupt is acknowledged, and the string instructions or product-sum operation instruction is executed immediately after the acknowledgement. In this case, these instructions will be aborted.	TN-16C-A157A/E	Jun.08.06 Rev.1.00	Technical Notification	45	List	-
M32C/80 Series M32C/90 Series : Usage precation for MUL.W Instruction MULU.W Instruction If the instruction, MUL.W or MULU.W and the memory for dest are used, the calculation result is 32-bit wide. Then, incorrect results are stored into the 16 high-order bits and also the next instructions are not executed as they are supposed to.	TN-16C-A156A/E	Jun.06.06 Rev.1.00	Technical Notification	26	List	-
M32C/80 Series Document Revision for Intelligent I/O Clock Asynchronous Serial I/O Mode (UART) Correction of User's Manual	TN-16C-A151A/E	Apr.26.06 Rev.1.00	Technical Notification	108	List	-
30240 Group: Usage Precautions for USB AUTOSET Function To execute an IN transfer of Endpoint1 to 4, transmission output may not be executed to use AUTOSET function.	TN-16C-A152A/E	Apr.24.06 Rev.1.00	Technical Notification	13	List	-
M16C/62P Group (M16C/62P), M16C/6N4, M16C/6N5, M16C/6H, M16C/6V Groups Precautions When Using the PM11 Bit (Port P3_7 to P3_4 Function Select Bit) Precautions when using the PM11 bit (port P3_7 to P3_4function select bit) in the PM1 register with 1 (portfunction).	TN-16C-A150A/E	Jan.16.06 Rev.1.00	Technical Notification	31	List	-
M16C/28 Group M16C/29 Group Precautions on Writing to I2C0 Data Shift Register (S00) of Multi-Master I2C bus Interface Precautions for writing to the S00 register when the arbitration lost detection flag is set to 1.	TN-16C-A149A/E	Dec.08.05 Rev.1.00	Technical Notification	28	List	-
Notification of Extended Specifications for M16C/30P Group Notification of partly extended specifications for M16C/30P Group	TN-16C-A148A/E	Oct.28.05 Rev.1.00	Technical Notification	74	List	-
M16C/Tiny Series Document Revision for CRC Snoop Function in the CRC Calculation Circuit The description of CRCSAR register (CRC snoop address register) has been revised as follows.When using the subject documents, please pay attention to the changes.	TN-16C-A143A/E	Jul.05.05 Rev.1.00	Technical Notification	67	List	-
M16C/Tiny Series Precautions When Main Clock Pins (XIN pin and XOUT pin) Are Not Connected To An Oscillator When using any of the above mentioned microcomputers, if the main clock pins (XIN pin and XOUT pin) are not connected to an oscillator, the internal system clock may not operate after power is on and therefore the microcomputer will not be activated.	TN-16C-A140A/E	Apr.11.05 Rev.1.00	Technical Notification	15	List	-
M16C/28 Group Precautions on Delayed Trigger Mode 0 of A/D Converter The timing when A/D conversion may not start properly in A/D converter delayed trigger mode 0.	TN-16C-A137A/E	Jan.31.05 Rev.1.00	Technical Notification	22	List	-
M30245 Group Correction and Precautions on I2C bus interface mode Correction and Precautions on I2C bus interface mode	TN-16C-136A/EA	Oct.01.04 Rev.1.00	Technical Notification	37	List	-
M30245FCGP Precaution on Serial Sound Interface (SSI) The first bit of a SSI transmission data may change its value afther the output valid time [0.5 cycle of SCK + 3cycles of BCLK].	TN-16C-135A/EA	Oct.01.04 Rev.1.00	Technical Notification	60	List	-
M16C Family Precautions Concerning External Trigger Input in One-Shot Timer Mode of Timer A When an external trigger input is used to start counting in one-shot timer mode of the timer A, another external trigger input during counting reloads a counter value and the timer continues counting. However, if another external trigger input is provided immediately before the counter reaches 0000h, the timer may stop counting.	TN-16C-125A/EA	Sep.16.04 Rev.1.00	Technical Notification	144	List	-
M16C/Tiny Series, Flash Memory Version, Precautions of Standard Serial I/O Mode Entry Pin An indeterminate value may be output from the I/O port while an L signal is applied to the RESET pin when entering standard serial I/O mode.	TN-16C-133A/EA	Sep.01.04 Rev.1.00	Technical Notification	24	List	-
M16C Family Precautions when Using Single-Sweep Mode of the A/D Converter When setting the ADST bit to 0 in single-sweep mode of A/D converter during A/D conversion and aborting A/D conversion, an A/D conversion interrupt may be generated.	TN-16C-132A/EA	Sep.01.04 Rev.1.00	Technical Notification	98	List	-
M16C Family Precautions when Using Serial Interface Special Mode 1 (I2C mode) When setting each condition generate bit (STAREQ, RSTAREQ and STPREQ) from 0 to 1 within half cycle of the transfer clock after setting the STSPSEL bit to 0, each condition may not be generated accurately.	TN-16C-130A/EA	Sep.01.04 Rev.1.00	Technical Notification	94	List	-
M16C/62P Group, M16C/6NM Group and M16C/6NN Group Precautions when Using the PC14 Register (Port P14 Control Register) When the PD14i bit (i=0 to 1) in the PC14 register is rewritten from 0 (input port) to 1 (output port), the unexpected value may be output from the pin.	TN-16C-129A/EA	Sep.01.04 Rev.1.00	Technical Notification	131	List	-
M16C Family Precaution Concerning Exiting from Stop Mode SCLL sync output enable is available in I2C bus interface mode only.	TN-16C-124A/EA	Sep.01.04 Rev.1.00	Technical Notification	162	List	-
M16C/6N, M16C/1N, M16C/29 Group Precautions When Performing CAN Configuration a.when the SMi2 bit in the SiC(i=3,4) register = 0(SOUTi output),	TN-16C-122A/EA	Sep.01.04 Rev.1.00	Technical Notification	81	List	-
M32C/80 Series Precautions When Canceling CAN Remote Frame Transmission/Reception Process flow when aborting remote frame transmission or canceling remote frame reception.	TN-16C-126A/EA	Aug.06.04 Rev.1.00	Technical Notification	88	List	-
M16C Family Precaution on entering wait mode The value in the internal RAM area may be rewritten when exiting wait mode if writing to the internal RAM area before entering wait mode.	TN-16C-128A/EA	Aug.01.04 Rev.1.00	Technical Notification	49	List	-
M32C/80 Series and M16C/80 Group Precaution Concerning Using NMI interrupt for Recovery from Stop Mode After exiting from stop mode using the NMI interrupt, the microcomputer may not enter stop mode by setting the CM10 bit, all-clock stop bit, in the CM1 register to 1 (stop mode).	TN-16C-127A/EA	Aug.01.04 Rev.1.00	Technical Notification	33	List	-
M16C/60 Series Precautions for changing SI/O3,4 SI/O port select bit Under the following conditions, the SOUTi (i=3,4) may be driven for about 10ns before going into a high-impedance state.a. when the SMi2 bit in the SiC(i=3,4) register = 0 (SOUTi output),b. SMi6 bit = 1 (internal clock),c. SMi3 bit is changed from 0 (I/O port) to 1 (SOUTi output, CLK function).	TN-16C-121A/EA	Aug.01.04 Rev.1.00	Technical Notification	35	List	-
M30245 Group Precautions on I2C bus interface mode SWC,SWC2,SWC9,STC are unavailable when SCLi is external clock in I2C bus interface mode.	TN-16C-123A/EA	Jun.01.04 Rev.1.00	Technical Notification	17	List	-
M30245 Group Precautions concerning UiC1 (i= 0 to 3) register The UiERE bit in the UiC1 register is set to 1 automatically (error signal output enabled) in certain conditions of CLKi pin and CTSi pin. If the PRYE bit in the UiMR register is set to 1 (parity enabled), the TxDi pin is held L if a parity error occurs during reception.	TN-16C-120A/EA	Feb.01.04 Rev.1.00	Technical Notification	14	List	-
M16C Family Precautions When Using Sub Clock When using the sub clock (XCIN-XCOUT) as the CPU clock (BCLK) or as the timer count source, DO NOT leave the CM03 bit set to 1 (XCIN-XCOUT drive capacity HIGH ).	TN-16C-119A/EA	Jan.05.04 Rev.1.00	Technical Notification	63	List	-
M16C/62N Group M3062GF8NFP/GP Precautions when Rewriting Flash Memory Using CPU Rewrite Mode If a read status register followed by program command is performed continuously, and with the address to read the status register set to the same address every time, the data in this address may change.	TN-M16C-113-0312	Dec.16.03 Rev.1.00	Technical Notification	34	List	-
Replace Sheets of Technical News No. M16C-115-0311 M16C/62P Precautions When Supplying Power to Microcomputer (Explanation of Addition in M16C/62 Group (M16C/62P) Data Sheet) If the power supply gradient before power applied to the VCC1 pin reached 2.7V does not meet the SVcc conditions, the microcomputer may malfunction.	TN-M16C-116-0311	Nov.11.03 Rev.1.00	Technical Notification	509	List	-
Replace Sheets of Renesas No. M16C-106-0309 M16C/62P : Precautions when Applying H to CNVSS Pin I/O Ports may be indeterminate in microprocessor mode and boot mode. Revise clerical figure errors.	TN-M16C-114-0310	Oct.08.03 Rev.1.00	Technical Notification	168	List	-
M16C/26 Precaution in Boot mode I/O Ports may be indeterminate in the boot mode.	TN-M16C-110-0310	Oct.01.03 Rev.1.00	Technical Notification	84	List	-
M32C/81 Group, M32C/82 Group and M32C/83 Group Precautions Concerning the UiC1 (i=0 to 4) Register The UiERE bit in the UiC1 register may be set to 1 depending on the CLKi and CTSi pin states, and the UiMR register setting.	TN-M16C-104-0310	Oct.01.03 Rev.1.00	Technical Notification	21	List	-
M16C/62N Group, M16C/30L Group Precaution on Stopping Main Clock when External Clock is Used in Xin If the CM05 bit (Main Clock Stop Bit) in the CM0 register is set to 1 while the external clock is input to the XIN pin, the clock input is rejected.	TN-M16C-96-0309	Sep.16.03 Rev.1.00	Technical Notification	45	List	-
M30245MC/8-XXXGP Cautions on Serial I/O Under certain condition there is a possibility that the cycle when the first data transfer is available is delayed for 256 cycles of BRG count source.	TN-M16C-112-0309	Sep.16.03 Rev.1.00	Technical Notification	24	List	-
M16C/62P, M16C/26 and M16C/6K9 Precautions when using an External Clock as the Main Clock Program may not operate correctly if an external clock, connected to the XIN pin while the main clock is selected as the CPU clock, is turned off temporarily and then restarted.	TN-M16C-109-0309	Sep.16.03 Rev.1.00	Technical Notification	73	List	-
M16C/62P, M16C/26 and M16C/6K9 Precautions when Using Wait Mode If the microcomputer exits wait mode, the program may not operate correctly.	TN-M16C-108-0309	Sep.16.03 Rev.1.00	Technical Notification	391	List	-
M16C/62P, M16C/26 and M16C/6K9 Precautions when Using Stop Mode If the microcomputer exits stop mode?? the program may not operate correctly.	TN-M16C-107-0309	Sep.16.03 Rev.1.00	Technical Notification	92	List	-
M16C/62P Group and M16C/26 Group Precautions when using Programmable I/O Ports The input threshold differs for each input pin that shares inputs with other peripherals.	TN-M16C-102-0309	Sep.16.03 Rev.1.00	Technical Notification	117	List	-
M16C/62P Group and M16C/26 Group Precautions when using Special Mode 4 (SIM mode) of UART2 A transmit interrupt request is generated when transmit data is written to the U2TB register while in special mode 4 (SIM mode) after reset.	TN-M16C-101-0309	Sep.16.03 Rev.1.00	Technical Notification	124	List	-
M16C/62P Group Revision in Electrical Characteristics Section of the Preliminary Data Sheet Rev 1.0 The standard value of Pull-up resistor when applied 3V of power has been revised. These revisions have been made in the Hardware Manual Rev.1.10 and Data Sheet Rev.1.10	TN-M16C-99-0309	Sep.01.03 Rev.1.00	Technical Notification	82	List	-
M16C/62P Group Precautions when using UART0 or UART1 as a slave in I2C mode P61 or P65 cannot be used as an output port when using UART0 or UART1 as a slave in I2C mode. Set P61 or P65 as an input port.	TN-M16C-100-0309	Sep.01.03 Rev.1.00	Technical Notification	24	List	-
M32C/81, M32C/82 and M32C/83 groups Precaution on the DMAII Bit in the RLVL Register If a hardware reset occurs while the INT0IC register or the RLVL register is being read, set the interrupt control register after setting the DMAII bit in the RLVL register to 0.	TN-M16C-98-0308	Aug.01.03 Rev.1.00	Technical Notification	20	List	-
M32C/80 series and M16C/80 group Precaution on Stop Mode The microcomputer may not enter stop mode with a certain condition.	TN-M16C-97-0307	Jul.01.03 Rev.1.00	Technical Notification	26	List	-
M16C/62 Group, M16C/6H Group, M16C/30L Group Cautions for Selecting Both Edges of INT0 pin as DMA Request Factor for DMA0 The following is necessary to trigger DMA0 requests on both edges of INT0:a. Set the DSEL3 to DSEL0 bits in DM0SL register to 0110b.b. Set the DMS bit in DM0SL to 1.c. Set the IFSR0 bit in IFSR register to 1 (both edges).	TN-M16C-94-0306	Jun.16.03 Rev.1.00	Technical Notification	59	List	-
M16C/60 Series, M16C/30 Series, M16C/20 Series Cautions for Writing to DMA Enable Bit in DMAi Control Register While the DMAE bit in the DMiCON register is a 1 (the DMAi is in an active state), if you set the DMAE bit to a 1 and a DMA request occurs while your changing the bit, the DMAi will continue operating instead of returning to the initial state.	TN-M16C-92-0306	Jun.16.03 Rev.1.00	Technical Notification	70	List	-
Precaution for the Use of the Three-Phase Motor Control Timer Functions Set the Value in the TAi-1 register, then rewrite the same value in the TAi-1 register after one cycle of the timer Ai count source has elapsed.	TN-M16C-95-0304	Apr.01.03 Rev.1.00	Technical Notification	20	List	-
Replacement Sheets of Technical News No. M16C-62-0009 Differences in Interrupt Operation of the M16C/80 Group Pursuant to Interrupt Revision Differences in Interrupt Operation of the M16C/80 Group Pursuant to Interrupt Revision.	TN-M16C-90-0302	Feb.16.03 Rev.1.00	Technical Notification	17	List	-
M32C/80 Series Cautions for Using DMAC When using the DMAC of the M32C/80 series, if the DCTi (DMAi transfer count) register of channel i is set to '1', ensure that a DMA request for channel i is not generated when the DMA of the channel i is being enabled.	TN-M16C-88-0209	Sep.01.02 Rev.1.00	Technical Notification	9	List	-
M16C/80 Group Cautions for Using DMA (2) (1) While enabling DMA, ensure that a DMA request for the channel is not generated.(2) After writing to the DMAi request cause select register, wait at least 26 BCLK cycles before enabling DMA by soft ware.	TN-M16C-87-0207	Jul.01.02 Rev.1.00	Technical Notification	11	List	-
M16C/80, M32C/82 and M32C/83 Groups Usage Precaution on Three-phase Motor Control Timer's Function While using the timers in Three-Phase Mode 1 and near Timer B2's overflow, if a count value is written to Timer Ai-1 register, a different count value may be written to Timer Ai instead of the value you want to set it to.	TN-M16C-86-0205	May.16.02 Rev.1.00	Technical Notification	14	List	-
M16C Family Usage Precautions when Clearing Interrupt Request Bit When clearing an interrupt request bit of the interrupt control register, depending on the instruction used, an interrupt request bit may not get cleared.	TN-M16C-85-0204	Apr.01.02 Rev.1.00	Technical Notification	24	List	-
M16C/62N Flash Memory Versions and M3062GF8NFP/GP Usage Precaution on Stop Mode An undefined operation can occur after returning to normal operation mode from a stop mode because an undefined interrupt is generated or, a BRK instruction occurred, etc.	TN-M16C-84-0204	Apr.01.02 Rev.1.00	Technical Notification	393	List	-
Note for flash memory programming using boot program When programming the internal flash memory using boot program, be careful about the pins state and connection.	TN-M16C-83-0202	Feb.01.02 Rev.1.00	Technical Notification	30	List	-
CAN transceiver control method with boot mode When writing in the internal flash memory via CAN in boot mode, set the mode of CAN transceiver as high-speed mode or normal operation mode.	TN-M16C-82-0201	Jan.16.02 Rev.1.00	Technical Notification	40	List	-
Corrections and Supplementary Explanation for M16C/20 Series, M16C/60 Series, M16C/80 Series Data Sheet and User's Manual A few corrections and supplementary explanation for the M16C/20 series, M16C/60 series, M16C/80 series User's Manual.	TN-M16C-75-0110	Oct.16.01 Rev.1.00	Technical Notification	17	List	-
Setting procedure of processor mode bits Do not change the processor mode bits simultaneously with other bits when changing the processor mode bits 01 or 11. Change the processor mode bits after changing the other bits.	TN-M16C-71-0105	May.16.01 Rev.1.00	Technical Notification	17	List	-
Supplemental Description for WAIT Peripheral Function Clock Stop Bit When the MCU running in low-speed or low power dissipation mode, do not enter WAIT peripheral function clock stop bit set to 1.	TN-M16C-69-0104	Apr.16.01 Rev.1.00	Technical Notification	47	List	-
'No.M16C-64-0011' Replacement M16C/80 Group Precautions When Using Address Match Interrupts No. M16C-64-0011 (When using address match interrupt function, unwanted interrupts may occur.) adds a correction to section 3.4. TN-M16C-66-0012 contains No. M16C-56-0007.	TN-M16C-66-0012	Dec.16.00 Rev.1.00	Technical Notification	19	List	-
Points to care about when using M16C/6N0, M16C/6N1 and M16C/6N3 groups Status read of the CAN module If CPU and CAN module attempt to access the SFR at the same time, please note that CPU access to SFR will not synchronize with the CAN module rewrite period.	TN-M16C-63-0011	Nov.16.00 Rev.1.00	Technical Notification	24	List	-
Precautions Regarding USB Packet Size in M30240Mx-xxxFP When there is a USB transaction in which the actual data packet size = (MAXP-1), its return packet may be shortened to only one byte.	TN-M16C-65-0011	Nov.08.00 Rev.1.00	Technical Notification	13	List	-
Notes on USB control registers of M30240 Group There is a possibility that using read-modify-write instructions to the USB control and status registers might cause incorrect data to be written to these registers.	TN-M16C-60-0009	Sep.01.00 Rev.1.00	Technical Notification	19	List	-
M16C/80 Group Precautions for Using HOLD Signal Although the HOLD pin may be held L P40 to P47 and P50 to P52 will not become high-impedance ports.	TN-M16C-59-0008	Aug.01.00 Rev.1.00	Technical Notification	11	List	-
Notes on Control Transfer of M30240 Group One Time PROM version Endpoint x (x = 1-4) transfer during control transfer may cause an unexpected response.	TN-M16C-58-0007	Jul.01.00 Rev.1.00	Technical Notification	22	List	-
M16C/80 Group Precautions for CLKOUT Pin (P53) When using the Clock Output function of port P53/CLKOUT pin (f8, f32 or fc output) in single chip mode, use port P57 as an input only port.	TN-M16C-57-0006	Jun.16.00 Rev.1.00	Technical Notification	7	List	-
M16C Family Cautions Using Data Registers that Include Write Only Bits If performing a read-modify-write sequence of instructions to a register with write only bits, please reset the write only bits to their previous values before writing back to the register.	TN-M16C-55-0006	Jun.01.00 Rev.1.00	Technical Notification	46	List	-
Replace Sheets of Technical News No. M16C-50-0004 Difference between M16C/62 and M16C/62A (include low voltage version) Difference between M16C/62 and M16C/62A (include low voltage version)	TN-M16C-54-0004	Apr.16.00 Rev.1.00	Technical Notification	27	List	-
M16C/80 Series, M16C/60 Series Cautions for Using Memory Expansion Mode or Microprocessor Mode Concerning the pins which function as address bus, data bus, or CS, WR, RD, etc. Set the corresponding port register and direction register after shifting to single-chip mode.	TN-M16C-49-0004	Apr.01.00 Rev.1.00	Technical Notification	8	List	-
M16C/80 Group Cautions for Using DMA There is a possibility that the DMAC will execute 2 transfers upon receiving only 1 DMA request or control of the MCU may be lost dpending on timing.	TN-M16C-44-0001	Jan.16.00 Rev.1.00	Technical Notification	18	List	-
M16C/80 Group Cautions for Interrupt Control Register There is the possibility of an interrupt occurring even if the interrupt is disabled and the interrupt request bit is cleared.	TN-M16C-42-0001	Jan.16.00 Rev.1.00	Technical Notification	33	List	-
M16C/80 Group Cautions for Using Decimal Arithmetic Instruction (DSUB, DSBB, DADD or DADC) When DMA transfer occurs when executing decimal operation instruction, the result of the operation will not be correct.	TN-M16C-40-9912	Dec.16.99 Rev.1.00	Technical Notification	26	List	-
M16C Family Cautions for Event counter mode with Timer A In the case of using Event counter mode as Free-Run type for timer A, the timer register contents may be unknown when counting begins.	TN-M16C-39-9911	Nov.01.99 Rev.1.00	Technical Notification	8	List	-
M16C/80 Group Cautions for Use INT Instruction When issue software interrupt by INT instruction, interrupt level (IPL) of register will be unknown value during interrupt routine.	TN-M16C-37-9910	Oct.16.99 Rev.1.00	Technical Notification	14	List	-
M16C/60 Series Precautions for Address Match Interrupt When external address and 8-bit bus, you can not use the address match interrupt for external address.	TN-M16C-32-9908	Aug.01.99 Rev.1.00	Technical Notification	7	List	-
M16C/62 M16C/6N Flash Memory Version Precautions for Boot Mode (2) When executing onboard write using boot mode, there is possibility of data in internal RAM being changed by the RESET signal.	TN-M16C-29-9906	Jun.16.99 Rev.1.00	Technical Notification	8	List	-
M16C/62, M16C/6N Flash Memory Versions Precautions for Boot Mode When executing onboard write using boot mode, some of the ports do not keep high impedance and output H data or unknown data momentarily during reset.	TN-M16C-27-9906	Jun.01.99 Rev.1.00	Technical Notification	9	List	-
M16C/61, M16C/62 Group Precautions for UART2 When using UART2 in UART mode choose internal clock.	TN-M16C-26-9905	May.16.99 Rev.1.00	Technical Notification	20	List	-
M16C/60, M16C/20 Series Precautions for Wait and Stop modes The interrupts for canceling the WAIT and STOP modes must be enabled before entering either mode. The priority level of the interrupts not used for these modes should be set to 0 before switching into the WAIT or STOP modes.	TN-M16C-25-9905	May.16.99 Rev.1.00	Technical Notification	15	List	-
M16C/62 Group Flash Memory Versions Precautions for External Bus Timing Some output hold time may be less than 0ns depending on circuit capacitance of the user's target system.	TN-M16C-24-9905	May.07.99 Rev.1.00	Technical Notification	13	List	-
M16C/62 Group Flash Memory Versions Precautions for Standard Serial I/O mode Apply a pull up resistor to NMI pin and disable interrupts when writing to M16C/62 Flash Memory Versions with Standard Serial I/O mode.	TN-M16C-21-9904	Apr.01.99 Rev.1.00	Technical Notification	12	List	-
'N0.M16C-16-9902' replace M16C/60 Group, M16C/61 Group, M16C/62 Group Precautions Setting Pull-up Resistor In memory expansion and microprocessor modes, some ports cannot be connected to pull-up resistor.TECHNICAL NEWS 'N0.M16C-16-9902' includes an error. This is the corrected version of 'N0.M16C-16-9902'.	TN-M16C-19-9903	Mar.16.99 Rev.1.00	Technical Notification	14	List	-
M16C/62 Group Precautions for UART2 Special Mode register When writing to U2SMR, clear bit 7 to 0.	TN-M16C-18-9902	Feb.16.99 Rev.1.00	Technical Notification	15	List	-
M16C/60 Group, M16C/61 Group, M16C/62 Group Precautions For Power Control State Transitions Wait to change modes until after oscillation has stabilized.	TN-M16C-17-9902	Feb.16.99 Rev.1.00	Technical Notification	21	List	-
Precautions Regarding Writing to M16C/60, M16C/61, M16C/62 and M16C/63 Group MCUs Interrupt Control Registers An incorrect interrupt may occur when the request bit of the interrupts is cleared or the interrupt priority level is changed in interrupt enable condition.	TN-M16C-14-9805	May.22.98 Rev.1.00	Technical Notification	19	List	-
Supplemental Description of DMAC for the M16C/60, M16C/61 and M16C/62 Group MCUs (1) In DMA active condition? if the DMA enable bit is set to 1, the DMAC will start to operate again from the initial conditions.(2) After the DMA request cause select bit has been modified, always clear the DMA request bit to 0.	TN-M16C-13-9802	Feb.01.98 Rev.1.00	Technical Notification	15	List	-
Note on dedicated input pin of the M16C/60 series MCU When two or more different power sources are supplied to the system, if the input voltage of the unused dedicated input pin is higher than a voltage of Vcc pin, do not connect the dedicated input pin directly to the power source. This will cau	TN-M16C-11-9710	Oct.01.97 Rev.1.00	Technical Notification	11	List	-
Note on using the A-D converter of the M16C/60 series MCU When the A-D register is read at the same time the A-D conversion results are being saved, a false value will be saved to the A-D register. This occurs when the divided main clock or sub-clock is used as the CPU internal clock.	TN-M16C-09-9705	May.16.97 Rev.1.00	Technical Notification	14	List	-

Others(8)

Document Title	Doc Number (Previous Number)	Issue Date Revision	Classification of Information	Size(KB)	Product Name	Remarks
Change of inner packing label Change of inner packing label	TN-WRP-A014A/E	Jul.13.11 Rev.1.00	Packing Change	344	List	-
Change of the locking pin position in the magazine (P750PC) used for shipment Change of the locking pin position in the magazine (P750PC) used for shipment	TN-WRP-A013A/E	Nov.12.08 Rev.1.00	Packing Change	710	List	-
Change with the stable supply of trays Change with the stable supply of trays	TN-WRP-A012A/E	Sep.30.08 Rev.1.00	Packing Change	1129	List	-
Change of plastic reel of 330mm in diameter for embossed carrier tape (Standardization of plastic reel) Standardization of plastic reel of 330mm in diameter to that complying with the JEITA standards (so-called EIAJ reel).	TN-WRP-A010A/E	Mar.24.08 Rev.1.00	Packing Change	71	List	-
Change of content printed on the side of inner box We will unify the content printed on the inner box for IC trays for the purpose of standardizing our tray packaging specification.	TN-WRP-A009A/E	Jan.09.08 Rev.1.00	Packing Change	30	List	-
Addition of Shipping Tray Type for LQFP2020 Packages Tray forming die is added in response to the increasing production of LQFP2020 packages, and for through handling in manufacturing factories, new tray type name is adopted.	TN-WRP-A007A/E	Jun.07.07 Rev.1.00	Packing Change	136	List	-
Change of reel diameter of embossed carrier tape (330 mmf reel to 254 mmf reel) Change of reel diameter of embossed carrier tape(330 mmf reel to 254 mmf reel)	TN-WRP-A006A/E	Feb.14.07 Rev.1.00	Packing Change	309	List	-
Change of Carrier Tape Material *Change from polyvinyl chloride (PVC) to polystyrene (PS). The career tape material is changed from PVC to PS.	TN-WRP-A005A/E	Jul.05.06 Rev.1.00	Packing Change	32	List	-