H8S/2111B

Product Overview:

The H8S/2111B is a microcomputer (MCU) made up of the H8S/2000 CPU employing Renesas Electronics's original architecture as its core, and the peripheral functions required to configure a system.
The H8S/2000 CPU has an internal 32-bit configuration, sixteen 16-bit general registers, and a simple and optimized instruction set for high-speed operation. The H8S/2000 CPU can handle a 16-Mbyte linear address space.
This LSI is equipped with ROM, RAM, a 16-bit free-running timer (FRT), an 8-bit timer (TMR), a watchdog timer (WDT), a serial communication interface (SCI), a keyboard buffer controller, a host interface (LPC), an I²C bus interface (IIC), and I/O ports as on-chip peripheral modules, required for system configuration.
A flash memory version is available for this LSI's ROM. This provides flexibility as it can be reprogrammed in no time to cope with all situations from the early stages of mass production to full-scale mass production. This is particularly applicable to application devices with specifications that will most probably change.
Note: There is no emulator tool which supports all functions of  this device.

General Functions

• High-speed H8S/2000 central processing unit with 16-bit architecture
• Upward-compatible with H8/300 and H8/300H CPUs on an object level
• Sixteen 16-bit general registers
• 65 basic instructions
• Address space: 16M byte
• Interrupt
  • Internal: 37
  • External: 9
• Varioius peripheral functions
  • 8-bit PWM timer (PWM)
  • 16-bit free-running timer (FRT)
  • 8-bit timer (TMR)
  • Watchdog timer (WDT)
  • Asynchronous or clocked synchronous serial communication interface(SCI)
  • I²C bus interface (IIC)
  • Keyboard buffer controller
  • Host interface (LPC)
  • 10-bit A/D converter
  • Clock pulse generator
• General I/O ports
  • I/O pins: 114
  • Input-only pins: 8

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