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Advanced microcomputers enable new and improved applications that invariably create the need for microcomputers that are even more advanced. This "circle of progress" mandates that Renesas, the world's leading manufacturer of microcontrollers, invest in research and development activities that generate the leading-edge technology needed to produce the leading-edge products that maintain our market leadership. A key factor in the circle of progress is the need for higher performance and lower power consumption in embedded applications. This important issue is covered in various ways in this semiconductor technology oriented issue of EDGE magazine.

Several of the R&D stories arise from the fact that today there are limits on the extent to which higher performance and lower power consumption can be achieved using single-core devices. Three articles highlight Renesas' own emphatic solution to this problem: multi-core microcomputers. Putting multiple CPU cores in a single chip increases processing performance, while reducing power consumption by keeping the operating frequency low.

Renesas already makes popular SoC (System on Chip) devices in the SH-Mobile family that combine different types of CPU cores. These pioneering multi-core products have reliably been delivering high levels of performance in several generations of mobile phones. Now, though, we have developed advanced architectures that use two to four CPU cores of the same type and raise this technology to the next level.

For use in embedded controllers Renesas has released the SH2A-DUAL CPU core, which combines two SH-2A RISC cores. It is described in the VIEWS ON article. For use in embedded processors, we have announced at the 2007 International Solid-State Circuits Conference (ISSCC) the SH-4A quad-core processor, which has four SH-4A cores. That technology advance is covered in an R&D Strategy story featuring Atsushi Hasegawa, who is responsible for Renesas' multi-core strategy. Additional R&D related articles in this issue highlight the advances described in six more papers that we and our technology partners delivered at ISSCC 2007 and at the 2006 International Electron Devices Meeting (IEDM).

The advances discussed in these stories are now, or will soon, help drive the circle of progress that is steadfastly leading toward a society of ubiquitous networks.

 


Part 1— Renesas' Multi-Core Technology
- R&D Strategy: Using Multi-core Architectures to Overcome Limitations of Single-core Microcomputers
- Prototype Quad-core SuperH Chip Reveals Basic Architecture and Other Details
Part 2— Renesas' Approach to Advanced Technology
- Summary of Key Papers Presented at IEDM 2006 and ISSCC 2007
- Development of a CMIS Transistor with a Hybrid Structure Using a Metal Gate (p-Type)
and Polysilicon Gate (n-Type)
- Reset Current Reduced to 100mA for a 1.5V Power Supply Using a Cell Structure With an Ultra-Thin Tantalum Pentoxide Boundary Layer
- Suppression of Anomalous Nickel Silicide Growth by Silicon Ion Implantation Reduces Standby Current Consumption in Prototype 65nm SRAM
- Estimating Ambient Temperature Based on Temperature Monitoring, Frequency, and Other Information to Calculate LSI Allowable Operating Power Budget in Real Time

- Read-Circuit and Write-Circuit Innovations Deliver Stable High-Speed Operation in 45nm Generation Memory Cell

- Inductively-coupled Inter-Chip Communication Technique Allows Chip Access without Using Debug Pins

 

Customer Visit RENESAS MCU  Application Report

 Applications in Small Cooking Appliances
Advanced Telecommunications Research Institute International
Views on Product and News Information
"SH2A-DUAL" Controller-oriented SuperH Microcomputer Core HDMI Receiver Combines V1.3 Input Ports and CEC Control Function
Dual-band RF Power Transistor for Products with Low Power Consumption
3G Mobile Phone Platform for the Rapid Development of HSDPA/W-CDMA and GSM/GPRS/EDGE Handsets
Cumulative Shipments of Renesas Flash Microcomputers Exceed One Billion
Dream Science - Walking in a Ubiquitous Society
Vol. 4: The Logic Loved by Scientists

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